For the machining of those hard-brittle substrates, such as sapphire wafers and SiC wafers, a polishing process can be essential.
Globally, there are about 40% of energy is being converted into electric power to be consumed, while it is known that the largest waste in the electric energy conversion happens in the semiconductor power components. Generally speaking, the silicon power components, that was once the most essential and mainstream in today's industrial society, had reached the material limit and can no longer fulfill the requirements in today's social development for demanding high frequency, high temperture, high power, high performance, high environmental resistance, light-weight and miniaturization. On the other hand, the SiC is advantageous in its wide energy band gap, excellent thermal conductivity and supreme chemical stability that it is suitable for making high-power high-temperature semiconductor components. Thus, the third generation semiconductors, such as the SiC semiconductor components, are designed with excellent semiconductor properties and are commonly used in almost every modern industrial field today with revolutionary effect, including photoelectronic devices and power electronic devices. The third generation semiconductors are expected to have great market potential and application foreground.
The SiC wafer has good material characteristics in voltage resistance, good heat resistance and low loss, so that it can be used as the key wafer material for making high-power electronic components. Consequently, it is becoming a global effort for increasing the processing efficiency of large-area SiC wafers, especially for those ≧4 inches in diameter.
However, since SiC is considered to be a superhard material with 9.25˜9.5 in Mohs hardness scale that is only second to diamond, the process for polishing SiC wafer can easily be the bottleneck in a manufacturing process as the material removal rate (MRR) for SiC is not larger than 0.2 μm/h and thus the whole polishing process may take more than 2 hours to complete. Not to mention that the current market trend demands for large-size SiC wafers, while there are more and more six-inch fab becoming available internationally. Nevertheless, it can be expected that the larger the wafer is, the slower the polishing process will be, so that the cost for such process may sometimes accounts for more than half of the manufacture cost. Therefore, the key factor for enhancing the process efficiency is to provide a solution to solve the aforesaid bottleneck.